This invention relates to a voltage-to-current converter comprising a first cell, which cell comprises: a first input terminal, a second input terminal and an output terminal, a first current source, a first transistor having a first main electrode, a second main electrode and a control electrode, having a main current path defined by the first and the second main electrode of the first transistor and coupled to the first current source in a first node for the passage of a first current to be supplied by the first current source, and having a junction defined by the first main electrode and the control electrode of the first transistor and connected in a forward direction between the first node and the first input terminal, a second current source, a second transistor of a first conductivity type, having a first main electrode connected to the second input terminal, a control electrode connected to the first node, and a second main electrode coupled to the second current source in a second node, and a third transistor of the first conductivity type, having a first main electrode connected to the first input terminal, a control electrode connected to the second node, and a second main electrode coupled to the output terminal.
Such a voltage-to-current converter is known from U.S. Pat. No. 4,574,233. When an input voltage source is connected to the first input terminal via a conversion resistor this will produce an input current from the first input terminal to the output terminal via the third transistor. The second input terminal is connected to the first supply terminal, which acts as a reference voltage source. The input current begins to flow as soon as the voltage of the input voltage source has become smaller than the reference voltage of the reference voltage source. This known converter has a substantially linear transmission from the first input terminal to the output terminal but operates only for one current direction of the input current. This problem can be solved by duplicating the known converter as a first cell and a second cell, one cell having its second input terminal connected to the first input terminal of the other cell. However, this gives rise to a problem with the quiescent-current setting of the third transistor in each of the two cells. As a result of tolerances the quiescent current is not only indeterminate but the quiescent current of the third transistor in one cell also flows through the conversion resistor of the other cell and vice versa. An undesirable effect of this is that the reference voltage of one cell depends on the quiescent current in the third transistor of the other cell. Moreover, for an accurate processing of small input voltages, it is required to have a small quiescent current through the third transistor so as to obtain a small offset voltage across the conversion resistors.